FAQ Database Discussion Community


How to put this command in a Makefile?

awk,makefile,make,docker
I have the following command I want to execute in a Makefile but I'm not sure how. The command is docker rmi -f $(docker images | grep "<none>" | awk "{print \$3}") The command executed between $(..) should produce output which is fed to docker rmi but this is not...

GNU make loop variable strange behavior

shell,for-loop,make,gnu
In my Makefile I am trying to copy a list of files from location1 to location2, then to location2 to location3. I got the following strange behavior: FILES_LIST=dir1/file1 dir2/file2 dir3/file3 ........ mytarget: for file in $(FILES_LIST) ; do \ #this works cp -vf location1/$$file location2/$(shell $$file##*/) ; \ #this does...

LFS 7.2: Hundreds of errors in glibc make check

make,glibc,lfs
I am on Section 6.9 of the LFS book. Everything before this section seemed fine. When I ran make check I got a huge number of errors. A longer transcript of my make check run can be found here on Pastebin. Summary of test results: 865 FAIL 1308 PASS 202...

How do I run only some makefile commands as root?

c,makefile,make,install,sudo
I have an install target in my Makefile and wish to run some commands that install shared libraries(requires root permissions) and some that install config files into $HOME/.config Usually I'd just tell the user to run sudo make install, however that results in the config file being installed to /root/.config...

GNU makefile rules and dependencies

c++,linux,makefile,make,gnu-make
I've been doing a lot of reading on how to write makefiles to build an application on Linux but I'm massively confused about the many different ways to apparently achieve the same goal. This is what I have come up with so far to build an archive. SHELL = /bin/sh...

Makefile overriding default implicit rule

c++,c,makefile,make
Why this rule cannot override the default implicit rule ? When make is invoked like: make myapp (suppose myapp.c is there). The make runs the default command to build and link the program instead the commands defined in this implicit rule: #... omitted code LCUS=$(LIBS)/libcus.a #... omitted code % :...

Make: How to process many input files in one invocation of a tool?

makefile,make,gnu-make
I have a data conversion process that is driven by GNU make. It takes human-generated input files and creates output files using a conversion progam. Obviously this is about as simple as a makefile can get: inputs=$(wildcard *.input) outputs=$(subst .input,.output, $(inputs)) .PHONY: all all: $(outputs) %.output: %.input converter $< -o...

Dependent C++ project binaries not relinked in Netbeans

c++,netbeans,makefile,make
I've got a two projects in Netbeans. The first a library, and the second an application. The application depends on the library. When I make changes to the library and attempt to run the application the library is rebuilt, however the library and application object files are NOT relinked unless...

Would GNU Make automatically add extra prerequisite?

c++,build,makefile,make
The following example snippet is from "Managing Projects with GNU Make(3rd edition)" p.21. count_words: counter.o lexer.o -lfl The author says that make will automatically add count_words.o to prerequisite list by implicit rule. Quoted: ..., make identifies four prerequisites: count_words.o (this prerequisite is missing from the makefile, but is provided by...

make not working on gobject-introspection due to glib error

compiler-errors,make,glib,gobject-introspection
I am running 64-bit Debian Wheezy and I have been trying to compile gobject-introspection using the steps here. When I initially tried to compile it using: ./configure --prefix=/usr --disable-static && make it complained that my version of GLib was too low (2.42.1). So then I went and compiled GLib 2.44.0,...

makefile read reused variable inside recipe

makefile,make
In trying to implement nonrecursive make, I have a Rules.mk which looks like: ############ # Enter Stack ############ sp := $(sp).x dirstack_$(sp) := $(d) d := $(dir) .. setup things like OBJECTS_$(d), DEPS_$(d), TARGET_$(d), etc ... ############ # Exit Stack ############ -include $(DEPS_$(d)) d := $(dirstack_$(sp)) sp := $(basename $(sp))...

trying to install valgrind but stuck at make valgrind, how?

c,make,valgrind,gnu-make
This might be a silly question, actually I have just started with it. I am following a tutorial to LCTHW and I am trying to install valgrind, the author specifies steps: 1) Download it (use wget if you don't have curl) curl -O http://valgrind.org/downloads/valgrind-3.6.1.tar.bz2 use md5sum to make sure it...

Make manage file in different directory

make
I have a program to compile a Less file into a CSS file. I've made a wildcard make target, which calls lessc with appropriate arguments to create the CSS file in the same directory: %.css: %.less node_modules/less/bin/lessc node_modules/less/bin/lessc $< [email protected] This produces the following output directory structure: css/ |- foo.less...

Glibc Compilation Error

linux,compilation,compiler-errors,make,glibc
I'm compiling glibc-2.12.1 in Ubuntu 10.10 (32 bit in VirtualBox). Steps followed: configure --prefix=/usr --disable-asm make [I'm building it from a new directory] I'm getting the following errors on running make: gcc ../sysdeps/i386/fpu/s_frexp.S -c -D__NO_MATH_INLINES -D__LIBC_INTERNAL_MATH_INLINES -I../include -I/home/l33thckr/Installations/glibc-build/math -I/home/l33thckr/Installations/glibc-build -I../sysdeps/i386/elf -I../nptl/sysdeps/unix/sysv/linux/i386/i686 -I../sysdeps/unix/sysv/linux/i386/i686...

GNU make equivalent to BSD make's $(var:Q)?

makefile,make,gnu-make,bsdmake
BSD make has a :Q variable expansion modifier, documented in the FreeBSD make man page as follows: :Q Quotes every shell meta-character in the variable, so that it can be passed safely through recursive invocations of make. If variable var has value a b\c"d'e$f, then $(var:Q) expands to a\ b\\c\"d\'e\$f...

Makefile : fclean gives error if program is not yet built

makefile,make
I have 2 makefiles that crash when I use the command make re if the program (or library) is not yet previously built, because make re calls fclean, which should remove the file and crashes if the file is not found. Here is one of the makefiles for a library...

xcode 6.3.2 external build

c++,xcode,makefile,make
I'm trying to compile an existing c++ project, originally developed on linux with gcc. The only external library is GSL (GNU Scientific Library). I have created an external build tool project to use xcode's debugger, but I currently have two issues. 1) When I try to build in xcode it...

Why is this makefile not creating an executable with MinGW?

makefile,make,mingw
I am trying out MinGW on windows. I've been able to use GCC to create a executable from a C source file. main.c is this: #include <stdio.h> int main() { int this_is_a_number; printf("Please enter a number: "); scanf("%d", &this_is_a_number); printf("You entered: %d", this_is_a_number); getchar(); return 0; } the makefile has...

How does MAKE remember the file timestamps

c,make
I've found this question which is basically asking the same, but got no real answer. Where is the make's config file / database file where it remembers the file timestamps, so it can tell what changed? I checked and there's no .make or similar in my project, nor in the...

Makefile targets with same file prefix, several file extensions

makefile,make
I'm writing a makefile that, as part of its operation, downloads and extracts a zipfile containing an ESRI shapefile. Shapefile is a misnomer, because a shapefile is actually a directory containing files named like shape.[shp,dbf,prj,shp.html,shp.xml,sbn,sbx] Is there a way of defining a list of extensions to append to a common...

Match-Anything Pattern Rules

make,gnu-make
I am using GNU Make 3.81 version. From the following example, I expect match anything pattern(%:) has to be print. Instead of that te%: has executed. Can some one explain, why target '%:' did not run? Is this not match all file name? Makefile: all: test echo [email protected] %: echo...

using makefile check if symlink exists, if not create

linux,shell,makefile,make
In makefile, i need to check if the following symlink exists 'include/libraries/libxyz.so', if not create one i.e run "ln -s libxyz.so.1 libxyz.so" at include/libraries . How do I do it ?

Confused how my Makefile is remaking object files

c++,makefile,make
My make file is failing to find my include directory when it tries to remake object files. For example, when I call make tests I get the output: g++ -c -o sdl_class.o sdl_class.cpp sdl_class.cpp:9:23: fatal error: sdl_class.h: No such file or directory #include <sdl_class.h> ^ compilation terminated. make: *** [sdl_class.o]...

What is the standard build tool in Erlang?

build,erlang,make,rebar
I am very new to Erlang programming language. Is there a standard build tool in Erlang? I have googled out these, not sure which one I should use. Erlang Make http://www.erlang.org/doc/man/make.html Rebar Erlang.mk ...

Visual Studio Make instead of GNU Make with Cygwin

make,cygwin,gnu-make
I'm still trying to build VTK on windows. I have installed Cygwin and I'm done configuring with CMake I think. However I'm facing the error that you can see on the screenshot below: the make command somehow tries to make through MS Visual Studio while I want to use the...

Make using implicit rule instead of explicit?

makefile,make,gnu-make
Here is my entire Makefile: TGT = call OBJS = main.o .PHONY : clean $(TGT) : $(OBJS) $(CC) -o [email protected] $^ %.o : %.s $(AS) -o [email protected] $< %.s : %.c $(CC) -S -o [email protected] $< clean : $(RM) $(TGT) *.o *.s When I run make, I was expecting: main.s...

What does the following makefile command do? /no-symbols-control-file

makefile,make,gnu-make,binaryfiles,contiki
I cam across the following command in a makefile: %-nosyms.$(TARGET).elf: %.co $(PROJECT_OBJECTFILES) $(INTERRUPT_OBJECTFILES) contiki-$(TARGET).a $(CC) $(CFLAGS) -o [email protected] $(filter-out %.a,$^) $(filter %.a,$^) $(filter %.a,$^) $(LDFLAGS) Source: Contiki/cpu/arm/stm32f103/Makefile.stm32f103 . Does this command generate no-symbols-control-file? What is the use of a no symbol image file?...

Makefile refuses to match target patterns under strange circumstances

makefile,make
I encountered some strange behavior, when one runs make hello-there and the makefile is hello-%: @echo hi $* I get hi there But when the makefile is just hello-%: I get make: *** No rule to make target `hello-there'. Stop. ...

mysql C++ will not compile with make but will if g++ arguments put on cmd line

c++,mysql,c++11,make,g++
So i'm just trying to compile this sample mysql C++ program. It will compile and run just fine if i put g++ -Wall -I/usr/include/cppconn -o mysql_test mysql_test.cpp -L/usr/lib -lmysqlcppconn on the command line. If i try to use make, it fails due to a undefined function call. What is wrong...

make with Cygwin

windows,make,cygwin
I am trying to set VTK on windows (did I say it was complicated?^^). I have successfully configured VTK with CMake and I am now trying to run make through cygwin. However when I go to the build directory and enter make all the terminal prints and does is: make...

Cannot place kernel's prototype in header

c,cuda,make
io.cuh: #ifndef IO_CUH #define IO_CUH #include <cuda.h> typedef struct{ unsigned width; unsigned height; unsigned char *image; //RGBA }rgb_image; __global__ void transformToGrayKernel(rgb_image *img); void decodeTwoSteps(const char* filename, rgb_image *img); void encodeOneStep(const char* filename, rgb_image *img); void processImage(const char *filename, rgb_image *img); #endif // IO_CUH I'm trying to compile simple program using...

How do I understand and fix error while compiling Linux kernel for embedded system

c,linux-kernel,make,arm,native
While trying to compile the following file: /* * linux/arch/arm/mm/proc-syms.c * * Copyright (C) 2000-2002 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software...

Making targets out of computed variables in make

makefile,make
Here is an example that doesn't work say-hello := greeting say-bye := farewell greeting: @echo "Hello" farewell: @echo "Bye" .SECONDEXPANSION: %-guvnah: $$(say-$*) @echo "Target was: $(say-$*)" The command make hello-guvnah Should yield hello Target was: greeting But shows only Target was: greeting ...

How to build a './configure && make && make install' software against a custom library which I also build?

linux,make,gnu,ld,configure
I am building tmux-2.0 from sources on a pretty regular Linux host. First attempt failed as it turned out that the version of libevent installed is older than required, so I proceeded to download and build libevent-2.0.22 from sources (current at the time of writing) first. Building of libevent succeeded...

How to parse mingw32-make result parsing in c++?

windows,gcc,make
I am invoking mingw32-make from my tool using CreateProcess(..).After the execution i want to know the results (such as whether target is generated or if there are any compilation errors etc...) of the execution. Can some one help me on how to parse the result.

Do you only need to build the googletest library once?

c++,cmake,make,static-libraries,googletest
So firstly I'm new to testing frameworks and relatively new to C++ but am trying to wrap my head around GoogleTest. I'm working on a Windows machine, running "Git for Windows" (MSYS) and MinGW whilst using Sublime Text as my code editor. I am using make as my build tool,...

Missing 'strcasestr.cpp' file when compiling Tesseract 3.03 training tools

make,ocr,tesseract,autoconf
I have managed to build the Tesseract 3.03 rc1 from source. But when I try to build the training tools, which is the very feature I want form 3.03, I got the following error. It seems there should be a strcasestr.cpp file at the vs2010 folder. But the downloaded source...

Can not find opencv naclport build output

c++,opencv,make,google-nativeclient
Sorry if this is a really dump question. I was able to build opencv for nacl using naclports. I checked-out with pepper 42 and the built it using NACL_ARCH=pnacl make opencv command and it built successfully. But in src/out/build/opencv folder there are no much files and it is not the...

Eclipse Makefile: Make Variables are skipped

eclipse,makefile,make
I have a project with a Makefile in it, on Unix console it works fine, compiles, builds and I can run the binary at the end. I imported the project into Eclipse workspace and somehow Makefile module of Eclipse cannot build the project now. It gives the following error: g++:...

What is Eclipse CDT is doing with 'make' under the hood

c,gcc,windows-7,make,eclipse-cdt
I'm on Windows 7 and have MinGW/gcc installed. I'm using the Eclipse CDT plugin to compile and build my first simple C programs, and am trying to follow what exactly the plugin is doing under the hood. I create a new "Hello World!" C project with the following directory structure:...

what -j4 value is used to invoke make?

make
How can I figure out, from a make rule, what is the value of the make -j argument ? Is there something like an environment variable ? For instance if I run: make -j4 something I would like the something rule to display 4. The GNU make manual page suggests...

Autodependency generation in makefiles

makefile,make,gnu-make,makefile-project,multiple-makefiles
I am trying to understand how autodependency is generated in makefiles in the given link, i cannot understand the following piece of code: DEPDIR = .deps df = $(DEPDIR)/$(*F) SRCS = foo.c bar.c ... %.o : %.c @$(MAKEDEPEND); \ cp $(df).d $(df).P; \ sed -e 's/#.*//' -e 's/^[^:]*: *//' -e...

Reuse a Make Variable

scope,make
I'm compiling a lot of very similar object files using make and want to do something similar to the following: BUILD_DIR := ./build/a BUILD_DIRS += $(BUILD_DIR) a: $(CC) $(BUILD_DIR)/file.c BUILD_DIR := ./build/b BUILD_DIRS += $(BUILD_DIR) b: $(CC) $(BUILD_DIR)/file.c Problem is that when I run make a The value of BUILD_DIR...

cURLcpp error while compiling source

c++,curl,make
I am kinda new to c++ and the use of github. I want to use cURL functionality in c++. Therefore I first forked curlcpp (by JosephP91) from github, and then followed the instructions from its README.txt. Now I get an Error when executing make # -j2 (with or without -j2...

Make not picking the needed target

c,makefile,make,gnu-make
I have written a make file for a program as under Panther!simpleguy:~/Code [62]$ cat make.def CC = gcc LIBS = -lpthread CODE_FILE = Code_In_C.c EXECUTABLE = Code_In_C all : ${CODE_FILE} ${CC} -o ${EXECUTABLE} ${LIBS} ${CODE_FILE} I tried to make it using below command Panther!simpleguy:~/Code [63]$ make all make.def make: ***...

GNU Make, generate file with default settings/content when absent

make,build-process,gnu-make,default-value
I would like make to either copy a file from the source tree into the target/build directory if it exits or generate an empty/default file if not. It would be easy to do the following: target/settings.json: src/settings.json cp $? [email protected] src/settings.json: echo "default..." > [email protected] But that taints the source...

make error during building webkitgtk

linux,makefile,cmake,make
I use UBuntu 14.04 LTS. I need to build webkitgtk 2.8.3 Here is an example instruction which I have used: linuxfromscratch When I run sudo make -j8 I get following log: Scanning dependencies of target JavaScriptCore-4-gir Scanning dependencies of target fake-generated-webkitdom-headers [ 0%] Scanning dependencies of target WebKit2-fake-api-headers Scanning dependencies...

How to correctly make install of binaries and data after compile in linux?

linux,make,install
After make of sources I have compiled executable file and data directory with images for it. What should I do at "make install" phase to correctly install these files to the linux system? And how then application can find installed data (in case when binary and data are placed in...

basic makefile ifeq how to

makefile,make,gnu-make
I am just learning about Makefiles and am having trouble with ifeq. Version = GNU Make 3.82 Here is my simple Makefile: CHECK := 0 CHECK2 := 0 check : @echo "Check=${CHECK}" @echo "Check2=${CHECK2}" ifeq (${CHECK2},${CHECK}) @echo "EQUAL" else @echo "NOT EQUAL" endif Here is the output: Check=0 Check2=0 NOT...

Cmake - not creating the dynamic links

cmake,make
The project that I am compiling is not linking my shared object file to the main program. This can be confirmed by doing the ldd command on my executable and seeing it say libba.so => not found. Inside my CMakeLists.txt file I have: add_library(ba SHARED "/usr/local/include/libba.cpp" "/usr/local/include/libba.h") target_link_libraries(ba (list of...

Automatic dependency processing in Makefile

makefile,make,gnu-make
I have a simple makefile. IDIR =./include CC=gcc CFLAGS=-I$(IDIR) SRCDIR = ./src ODIR=obj LDIR =./lib LIBS=-lm SRC = hellomake hellofunc OBJ = ${SRC:%=$(ODIR)/%.o} _DEPS = hellomake.h DEPS = ${_DEPS:%=$(IDIR)/%} $(ODIR)/%.o: $(SRCDIR)/%.c $(DEPS) $(CC) -c -o [email protected] $< $(CFLAGS) hellomake: $(OBJ) gcc -o [email protected] $^ $(CFLAGS) $(LIBS) .PHONY: clean clean: rm...

GoogleTest CMake doesn't recognize TEST_F: Like it's not recognizing GTest something

linux,cmake,make,googletest
OK, I admit it, this is a unique case. When we build our application we are using make, so I've included my tests in a test folder under src. Then at the same level as our release folder we have created a unit-test folder that includes all of our source...

How to run program after compiling with Makefile

c++,makefile,make
I have a assign4a.cpp, list.h, and list.cpp file. I compiled them with my make file but don't know what command I would use to run the program. What I tried to run have tried a.out and ./a.out both of them give me "Command not found" Makefile CFLAGS = -c -Wall...

Makefile process all files in one directory, output to another.

makefile,make
How do I set up a Makefile to process all files in one directory, redirecting output to another (one output file per input file)? I have: INPUTS := $(wildcard ./input/*.txt) OUTPUTS := $(patsubst %.out,%.txt,$(wildcard ./input/*.txt)) $(OUTPUTS): $(INPUTS) python process.py [email protected] > ./output/${@:%.txt=%.out} ... but it keeps regenerating files in ./output...

make: f2py: No such file or directory

python,make,f2py
I am running Mac OS X 10.10. I have some python code I have inherited. I need to run "make" in a certain directory, because I get a warning when I run my python script along the lines of WARNING: failed to import test1lib. Please run make in /this/directory/ So...

mono make install fails with “Error 1”

mono,make
I've finally managed to get mono to build from sources, but make install invoked from the top build directory fails at the following point: make[6]: Entering directory `/bld/mono/mono-4.0.0/mcs/class/System' make install-local WARNING: generic atexit() called from legacy shared library make[7]: Entering directory `/bld/mono/mono-4.0.0/mcs/class/System' MONO_PATH="./../../class/lib/build:$MONO_PATH" /bld/mono/mono-4.0.0/runtime/mono-wrapper ./../../class/lib/build/gacutil.exe /i ./../../class/lib/net_4_5/System.dll /f /root /usr/mono/lib...

Avr-g++ compilation failed with Make Error 1

eclipse,arduino,make,avr,avr-gcc
I'm trying to compile arduino code in Eclipse. Below is build log. make all Building file: ../test.cpp Starting C++ compile "/bin/avr-g++" -c -g -Os -w -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -MMD -mmcu=atmega328p -DF_CPU=16000000L -DARDUINO=163 -DARDUINO_AVR_UNO -DARDUINO_ARCH_AVR -I"/opt/arduino-1.6.3/hardware/arduino/avr/cores/arduino" -I"/opt/arduino-1.6.3/hardware/arduino/avr/variants/standard" -I/usr/lib/avr/include -MMD -MP -MF"test.cpp.d" -MT"test.cpp.d" -D__IN_ECLIPSE__=1 -x c++ "../test.cpp" -o...

what does -wl, --start-group mean in make file?

make
I have this in my Make file.. # Create list of object files # LIB_OBJS = -Wl,--start-group \ $(T_OBJ_DIR)/Source1.o \ $(T_OBJ_DIR)/Source2.o \ $(T_OBJ_DIR)/Source3.o \ $(T_OBJ_DIR)/Source4.o \ $(T_OBJ_DIR)/Source5.o \ -Wl,--end-group \ Could anyone please explain What "-Wl,--start-group" and "-Wl,--end-group" mean?...

Problems Building GMP using iOS SDK 8.3

ios,compilation,make,gmp,armv7
I can't build GMP for iOS -arch armv7s no matter how I configure make. First, configure wasn't finding a c compiler, then I got past the configure stage with this : ./configure CC=clang CPP="/Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/clang -E" CPPFLAGS="-isysroot /Applications/Xcode.app/Contents/Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS8.3.sdk/ -miphoneos-version-min=8.0 -arch armv7s -target arm-apple-darwin" --host=aarch64-apple-darwin --disable-assembly --enable-static...

How “make” command locates makefile

unix,make
I am trying to understand the working of "make" command (just started on this command). I have an ".sh" file which has a script to execute "make" command as shown below: source /somepath/environment-setup-cortexa9hf-vfp-neon-poky-linux-gnueabi make arch=arm toolchainPrefix=arm-poky-linux-gnueabi- xeno=off mode=Debug all The directory where the script file is located has a file...

Reuse jquery plugin without conflict

javascript,jquery,plugins,make,conflict
I have a little plugin working as a progressbar. the problem is: I can't update progressbar's value because every change I made, affect just the last object created =( also.. if I call it as: $(node-selector).progBar().setValue() it works calling the correct node but it loss the config object follow the...

make[1]: exec(f77) failed (No such file or directory) on DragonFly BSD

make,fortran,bsd,html-xml-utils
I get this error when trying to compile html-xml-utils-6.9 on DragonFly BSD. Funny thing is, when doing grep -r f77 in the source directory, the result is empty. So no such option is in the constructed Makefile after ./configure. This is my configure output: http://pastebin.com/4tKEXQKG I tried to do alias...

Safely pass Make variable to shell commands

shell,make,escaping,quoting
Consider this Makefile: VAR1=oneword VAR2=two words VAR3=three" quoted "words test: printf '>%s< ' "$(VAR1)" "$(VAR2)" "$(VAR3)" @echo If I run it, I get $ make test printf '>%s< ' "oneword" "two words" "three" quoted "words" >oneword< >two words< >three< >quoted< >words< print but I would like to get the same...

How do you add APP_CFLAGS to an android makefile

android-studio,makefile,jni,make
I was able to successfully pass in APP_CFLAGS via eclipse through via the settings' ndk-build command as ndk-build -B NDK_DEBUG=1 APP_CFLAGS=-DTEST I have now switched to Android studio and was trying to do it directly in the makefile with the following, but its not taking: LOCAL_PATH:= $(call my-dir) include $(CLEAR_VARS)...

Building only a small subset of project using autotools

make,autotools,autoconf
I have a large project using autotools that contains some code that builds into a utility library. The project has quite a few dependencies and I would like to compile a specific subset of that utility library for mobile environments (Android/iOS). I expect a lot of dependencies to be unnecessary...

Build libfreenect on ubuntu

build,header,cmake,make,openkinect
I built the libfreenect (Open Kinect) library from sorce, but the libraries and headers are nowhere to be found. I have checked the paths specified in the configuration step, i.e., /usr/local, /usr/local/lib, usr/local/include. Has anyone faced this problem with libfreenect or any other library? ~/libfreenect/build\ $ cmake -L .. -DBUILD_AUDIO=ON...

Fast kernel recompile

linux,build,linux-kernel,make,incremental-build
I'm trying to automate the process of recompile a upgraded kernel. (I mean version upgrade) What I do: Backup the object files (*.o) with rsync Remove the directory and make mrproper Extract new source and patch Restore object files with rsync But I found it doesn't make sense. Since skip...

What does semicolon-termination inside a Makefile's define directive do?

makefile,make,openwrt
I'm wondering what the semicolons in the following makefile snippet do: define Package/xxsim/CopyLocalFiles $(call cp, files/Adapter20Sim.h, $(PKG_BUILD_DIR)/xxsim); $(call cp, files/Adapter20Sim.cpp, $(PKG_BUILD_DIR)); endef Hooks/Prepare/Post+=Package/xxsim/CopyLocalFiles In case it matters, the makefile is for a custom component (xxsim) in the OpenWRT buildsystem. I would expect that the semicolons are unnecessary, per, e.g., this...

After building julia from source, what's safe to delete?

make,julia-lang
I was able to build it on a tiny computer, but the result now takes up ~ 1 GB of the 1.3 GB I had free. Most of this is in the /deps folder -- this is safe to delete after the build, correct?

Make: How to generate list of all .c files except one

c,makefile,make,glob
I have a make project with two real targets, a testsuite and the project's executable. To build these I want rules something like: testsuite: *.c (except executable.c) *.h clang ... *.c (except executable.c) -o testsuite executable: *.c (except testsuite.c) *.h clang ... *.c (except testsuite.c) -o executable What's the correct...

Haskell make recipe fails for Paradox theorem prover using GHC

linux,haskell,make,ghc,theorem-proving
I am trying to install the paradox theorem prover sourced from here. When I run the makefile this is the command that runs: ghc -optl -static -lstdc++ -I../instantiate -I../minisat/current-base ../minisat/current-base/Solver.or ../minisat/current-base/Prop.or ../instantiate/MiniSatWrapper.or ../instantiate/MiniSatInstantiateClause.or -fglasgow-exts -O2 -static -threaded -main-is Paradox.Main.main --make Paradox.Main -o paradox And it results in several errors like...

Can Make be made to understand that a/../z and b/../z are the same location?

makefile,make,gnu-make
I have a somewhat large and complex Makefile setup that postprocesses some data files. Overall it work quite well, but I have run into an annoying issue where Make builds the same target many times over under different directory names. As a simple example, consider the Makefile foo : 1/foo...

Linux install command for mingw?

windows,make,install,mingw,mingw32
When trying to build a library from source using make and MinGW, I realized (from errors) that I don't have the install command, which I understand to be a combination of cp, chown, chmod, strip, and maybe some other stuff. I figured, hey, someone's got to have a copy of...

Error installing make on Intel Galileo

make,intel-galileo
I am trying to install make on my Intel Galileo using the following command: opkg install make However, this fails with the following ouput: Installing make (3.82-r3) to root... Downloading http://iotdk.intel.com/repos/1.0/iotdk/i586/make_3.82-r3_i586.ipk. Installing libc6 (2.18-r0) to root... Downloading http://iotdk.intel.com/repos/1.0/iotdk/i586/libc6_2.18-r0_i586.ipk. Collected errors: * check_data_file_clashes: Package libc6 wants to install file /lib/libpthread.so.0 But...

make: *** No rule to make target 'rm', needed by 'clean.Stop

c++,makefile,make
I am working with cygwin on windows 8.1. I have used the following make file .SUFFIXES : .o .C CFLAGS = -g2 CC =g++ ${CFLAGS} LIBRARIES = -lm .C.o : ${CC} -c $< SOURCE-FILES = sparsegraph.C myvarious.C pairlist.C graphlist.C peo.graph.C choldc.C copy.C metropolis_fns.C likelihood.C metropolis.C OBJECT-FILES = sparsegraph.o myvarious.o pairlist.o...

What does $(@:.h=.h.d) mean in GNU make?

make
I'm maintaining a (horrendously complicated) Makefile, and in some recipes I saw the following: $(@:.h=.h.d) I have absolutely no clue as to how to interpret this, or whether there's any documentation on those characters. Obviously, Google won't work because it thinks I'm typing gibberish. I saw a related question about...

Number of parallel build jobs in recursive make call

makefile,make,gnu-make
I have a makefile which wraps the real build in a single recursive call, in order to grab and release a license around the build, regardless of whether the build succeeds. Example: .PHONY main_target main_target: @license_grab & @sleep 2 [email protected]$(MAKE) real_target @license_release This works great, until I want to run...

Nested For loop in makefile

shell,makefile,make
I am trying to loop through the .c files in a specific directory through the makefile. i used the following code, but it seems not working: DIR= Sources \ Sources_2 @for entry in ${DIR} ; \ do \ @for i in $${entry}/*.c ; \ do \ echo "Processing $${i}"; \...

make target with multiple extension

makefile,make
How to do the following in gnu make (on mac). I have files with extendion .js and .jsx which needs to go through the build. SRC = $(shell find src -name '*.js' -o -name '*.jsx') LIB = $(SRC:src/%=lib/%) lib/%.js: src/%.js @echo "building [email protected]" above only define the target for *.js...

Apply distinct flags when compiling a subset of the sources

makefile,make,gnu-make
I have two sets of source files in my project from which I need to generate object files. SET_ONE = foo.o bar.o SET_TWO = zerz.o zork.o I want to pass add an extra option to CFLAGS when building the files in SET_ONE but not for those in SET_TWO. For example,...

Sequential character substitution in makefile

makefile,make
I have the example makefile below. I am trying to create a directory structure with multiple substitutions, and it seems to be doing a cartesian product when I want by-index substitution: genomes = C57B6NJ AKJ GENOME_DIRS = ${genomes:%=${BASE_DATA_DIR}/genomes/%} TWO_BITS = ${genomes:%=${GENOME_DIRS}/%.2bit} all: @echo ${TWO_BITS} # OUTPUT # Thu Apr 30...

Gnu make: is it possible to delay include directive to secondary expansion?

include,make,gnu-make
I need to delay inclusion of dependency fragments until second expansion time because the make file I'm editing is itself an include file and I will not have a list of source files to generate the includes until secondary expansion. .SECONDEXPANSION: AUTO_DEPENDENCY_FILES = $(patsubst %.cc, depend/%.d, $(CC_SRC_FILES)) # the following...

`make depends` magic in gnu make?

makefile,make,gnu-make
I have a simple script (depends.sh) that generates the dependency file, and made some changes from the dependency file. #!/bin/sh #echo "## Got: $*" CC="$1" DIR="$2" shift 2 case "$DIR" in "" | ".") $CC -MM -MG "[email protected]" | sed -e '[email protected]^\(.*\)\.o:@\1.d \1.o:@' ;; *) $CC -MM -MG "[email protected]" |...

Create directories when generating object files in gcc

gcc,makefile,make
gcc -o abc/def.o def.c generates def.o file in a directory abc; only when there exists a directory abc. Is there a way to make gcc to create a directory when the enclosing directory of the generated object file does not exist? If not, what could be the easiest way to...

Which operating systems support passing -j options to sub-makes?

make,gnu-make
From the man page for gnu make: The ‘-j’ option is a special case (see Parallel Execution). If you set it to some numeric value ‘N’ and your operating system supports it (most any UNIX system will; others typically won’t), the parent make and all the sub-makes will communicate to...

CMake does not find OpenCV libraries

c++,opencv,linker,cmake,make
Similarly to this question, I have troubles using OpenCV and CMake on OS X 10.10.3. After much hassle, I finally managed to build the OpenCV 3.0 beta on my system; the headers now reside in /usr/local/include and the libs – as they should – are in /usr/local/lib. I have small...

Dot in front of variables in make files

makefile,make,gnu-make
I am not able to figure out what does a dot . in front of a variable in makefile does. For e.g.: SOURCEDIRS = . $(PROJECTDIRS) $(TARGET_DIRS_CONCAT) vpath %.c $(SOURCEDIRS) It would be great if someone could tell me. Thanks!...

C Compilation error in Make but not GCC/G++

c,gcc,make
I've just started experimenting with C, but am having issues compiling a simple, single file application from the command line with Make (on Ubuntu 14.04.2). I've included math.h, but methods like ceil and sqrt are 'undefined' when using Make. It seems Make can't link the math.h library, but GCC/G++ seems...

Is the first target in Makefile an implicit phony target?

makefile,make
I am studying a Makefile obtained from a compiler course project. Only a part of it is pasted here. # Retain intermediate bitcode files .PRECIOUS: %.bc # The default target builds the plugin plugin: make -C lib/p1 # create .bc from source %.bc: %.c clang -emit-llvm -O0 -c $*.c -o...

CTest not detecting tests

cmake,make,ctest
I have a project with a structure ├── CMakeLists.txt ├── mzl.c ├── mzl.h └── tests ├── CMakeLists.txt ├── mzl-communication-test.c ├── mzl-setup-test.c ├── mzl-test-errors.c └── mzl-test-errors.h Where the top directory CMakeLists.txt file is project(mzl) cmake_minimum_required(VERSION 2.8) add_subdirectory(tests) # Enable testing for the project enable_testing() # Find zmq find_library(ZMQ_LIB zmq REQUIRED) message(STATUS...

Ocamlfind command not found

centos,make,ocaml,opam,ocamlfind
I'm running into an issue installing a package that's reliant on ocamlfind but I'm getting an ocamlfind: command not found error when making. I have installed ocamlfind with the ocaml package manager and have tried reinstalling using "opam reinstall ocamlfind". I have also tried the 'eval opam config env' command...

Using shell in Makefile to find Ubuntu Version

shell,ubuntu,awk,makefile,make
I'm trying make Ubuntu version specific distros of my tool so I want to get the os name and version. I have the following code: ifeq ($(OS),Windows_NT) OS_POD+=win else UNAME_S := $(shell uname -s) ifeq ($(UNAME_S),Linux) OS_VERS := $(shell lsb_release -a 2>/dev/null | grep Description | awk '{ print $2...

How do I compile and install the source code on OpenShift?

compilation,installation,make,openshift,openshift-cartridge
I'm trying to install 'whois' on OpenShift online, I can't install with yum due to the permissions \> yum install whois error: cannot open Packages database in /var/lib/rpm CRITICAL:yum.main: Error: rpmdb open failed I don't know any alternative ways to install a package, so considering to compile source code. make...

How does make tell when a file hasn't been modified?

make
Make can tell if a file has been modified since the last make invocation. I guess it compares the files' modification times with the time they were last built. To do this it would have to store the latest times on disk, right? Anyone know if and where or how...

Using a pipe (or) in sed

regex,linux,sed,makefile,make
From a variable $(JS_SOURCES) containing something like " thing.js myapp.mod1.js otherthing.js myapp.mod1.submod.js myapp.othermodule.js " make writes a file containing mod1,othermodule. It works with this code: ./build/modules.txt: $(JS_SOURCES) @echo "$(JS_SOURCES)" | sed -r -e 's/\s\S*myapp\.(\w+)\.js\b/ \1/g' -e 's/\S*\.\S*//g' -e 's/^\s+//' -e 's/\s+$$//' -e 's/\b\s+\b/,/g' > [email protected] And my question is Why...

What's the difference between [email protected] and $1 when there is only one parameter?

makefile,make
There are some C code: apple.c #include<stdio.h> int main(void) { printf("apple\n"); return 0; } Makefile apple: gcc -c [email protected] gcc [email protected] -o [email protected] $ make apple and it works perfectly. But if I modify Makefile as: apple: gcc -c $1.c gcc $1.o -o $1 $ make apple It does not...

Why does gcc search header files from non-exist folders?

c,linux,gcc,compiler-errors,make
I am trying to build an open source project shark on CentOS 7, and get very weird build errors: make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include/stdarg.h', needed by `core/luv/luv.o'. make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include/stddef.h', needed by `core/luv/luv.o'. make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include-fixed/limits.h', needed...

make oldconfig overwriting value in .config

linux,makefile,linux-kernel,make
I'm attempting to compile the linux kernel and use a custom .config file. So I copy the .config to my folder where the kernel source is, and run "make oldconfig" on the file to see if I'm missing anything. However, it appears that doing so modifies a few of my...

dividing outputs in make by filename

bash,make
I am processing some files and want to at one point create two categories depending on the filename so I can compare the two. Is this possible in a makefile? %.output1: %.input ifneq (,$(findstring filename1,$(echo $<))) mv $<.output1 [email protected] endif %.output2: %.input ifneq (,$(findstring filename2,$(echo $<))) mv $<.output2 [email protected] endif...

A make rule for verbosity

makefile,make
Typically we have this in a Makefile %.o:%.c $(cc) $(flags) -o [email protected] -c $< When the amount of flags is huge, I feel better to write this instead %.o:%.c $(info $(cc): $< --> [email protected]) @$(cc) $(flags) -o [email protected] -c $< However it can be useful to sometime see everything. So...