debugging,android-ndk,floating-point,arm , fpscr register is not updated when enabling floating point exceptions on arm7, SIGFPE not generated


fpscr register is not updated when enabling floating point exceptions on arm7, SIGFPE not generated

Question:

Tag: debugging,android-ndk,floating-point,arm

fpscr register is not updated and SIGFPE is not generated. This was tested on an NVidia Shield Tablet and a 1st gen Nexus 7.

feenableexcept(FE_DIVBYZERO | FE_INVALID | FE_OVERFLOW);

The implementation calls code, which eventually executes this assembly:

  asm _volatile__("vmsr fpscr,%0" : :"ri" (fpscr));
  ; disassembly follows
  ldr r3, [r11, #-8] 
  vmsr fpscr, r3

vmsr fpscr does not update. It remains 0x20000010 when it should be updated to 0x20000710.

Tested with -mfloat-abi=soft and -mfloat-abi=softfp.

What can I conclude?


Answer:

The ARM ARM has this to say about all the exception-trapping bits in FPSCR:

[...]. This bit is RW only if the implementation supports the trapping of floating-point exceptions. In an implementation that does not support floating-point exception trapping, this bit is RES0.

The Tegra K1 SoC in the SHIELD Tablet has Cortex-A15 CPUs, which don't support VFP exception trapping.

The Tegra 3 SoC in the original Nexus 7 has Cortex-A9 CPUs (with the VFP+NEON implementation), which don't support VFP exception trapping

What is particularly unhelpful is that from userspace you can't even access the MVFR0 feature register to find this out programatically.

I think you can only conclude that you don't have any hardware which supports trapped exceptions ;)


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