make , what does -wl, --start-group mean in make file?


what does -wl, --start-group mean in make file?

Question:

Tag: make

I have this in my Make file..

# Create list of object files
#
LIB_OBJS =  -Wl,--start-group \
$(T_OBJ_DIR)/Source1.o \
$(T_OBJ_DIR)/Source2.o \
$(T_OBJ_DIR)/Source3.o \
$(T_OBJ_DIR)/Source4.o \
$(T_OBJ_DIR)/Source5.o \
-Wl,--end-group \

Could anyone please explain What "-Wl,--start-group" and "-Wl,--end-group" mean?


Answer:

Those are flags to the linker (that's what -Wl means) so the documentation for ld (the linker) will explain the rest.

From the man page for GNU ld:

-( archives -)

--start-group archives --end-group

The archives should be a list of archive files. They may be either explicit file names, or -l options.

The specified archives are searched repeatedly until no new undefined references are created. Normally, an archive is searched only once in the order that it is specified on the command line. If a symbol in that archive is needed to resolve an undefined symbol referred to by an object in an archive that appears later on the command line, the linker would not be able to resolve that reference. By grouping the archives, they all be searched repeatedly until all possible references are resolved.

Using this option has a significant performance cost. It is best to use it only when there are unavoidable circular references between two or more archives.


Related:


How to parse mingw32-make result parsing in c++?


windows,gcc,make
I am invoking mingw32-make from my tool using CreateProcess(..).After the execution i want to know the results (such as whether target is generated or if there are any compilation errors etc...) of the execution. Can some one help me on how to parse the result.

make: *** No rule to make target 'rm', needed by 'clean.Stop


c++,makefile,make
I am working with cygwin on windows 8.1. I have used the following make file .SUFFIXES : .o .C CFLAGS = -g2 CC =g++ ${CFLAGS} LIBRARIES = -lm .C.o : ${CC} -c $< SOURCE-FILES = sparsegraph.C myvarious.C pairlist.C graphlist.C peo.graph.C choldc.C copy.C metropolis_fns.C likelihood.C metropolis.C OBJECT-FILES = sparsegraph.o myvarious.o pairlist.o...

mono make install fails with “Error 1”


mono,make
I've finally managed to get mono to build from sources, but make install invoked from the top build directory fails at the following point: make[6]: Entering directory `/bld/mono/mono-4.0.0/mcs/class/System' make install-local WARNING: generic atexit() called from legacy shared library make[7]: Entering directory `/bld/mono/mono-4.0.0/mcs/class/System' MONO_PATH="./../../class/lib/build:$MONO_PATH" /bld/mono/mono-4.0.0/runtime/mono-wrapper ./../../class/lib/build/gacutil.exe /i ./../../class/lib/net_4_5/System.dll /f /root /usr/mono/lib...

Cmake - not creating the dynamic links


cmake,make
The project that I am compiling is not linking my shared object file to the main program. This can be confirmed by doing the ldd command on my executable and seeing it say libba.so => not found. Inside my CMakeLists.txt file I have: add_library(ba SHARED "/usr/local/include/libba.cpp" "/usr/local/include/libba.h") target_link_libraries(ba (list of...

Make: How to process many input files in one invocation of a tool?


makefile,make,gnu-make
I have a data conversion process that is driven by GNU make. It takes human-generated input files and creates output files using a conversion progam. Obviously this is about as simple as a makefile can get: inputs=$(wildcard *.input) outputs=$(subst .input,.output, $(inputs)) .PHONY: all all: $(outputs) %.output: %.input converter $< -o...

Would GNU Make automatically add extra prerequisite?


c++,build,makefile,make
The following example snippet is from "Managing Projects with GNU Make(3rd edition)" p.21. count_words: counter.o lexer.o -lfl The author says that make will automatically add count_words.o to prerequisite list by implicit rule. Quoted: ..., make identifies four prerequisites: count_words.o (this prerequisite is missing from the makefile, but is provided by...

makefile read reused variable inside recipe


makefile,make
In trying to implement nonrecursive make, I have a Rules.mk which looks like: ############ # Enter Stack ############ sp := $(sp).x dirstack_$(sp) := $(d) d := $(dir) .. setup things like OBJECTS_$(d), DEPS_$(d), TARGET_$(d), etc ... ############ # Exit Stack ############ -include $(DEPS_$(d)) d := $(dirstack_$(sp)) sp := $(basename $(sp))...

How to build a './configure && make && make install' software against a custom library which I also build?


linux,make,gnu,ld,configure
I am building tmux-2.0 from sources on a pretty regular Linux host. First attempt failed as it turned out that the version of libevent installed is older than required, so I proceeded to download and build libevent-2.0.22 from sources (current at the time of writing) first. Building of libevent succeeded...

Gnu make: is it possible to delay include directive to secondary expansion?


include,make,gnu-make
I need to delay inclusion of dependency fragments until second expansion time because the make file I'm editing is itself an include file and I will not have a list of source files to generate the includes until secondary expansion. .SECONDEXPANSION: AUTO_DEPENDENCY_FILES = $(patsubst %.cc, depend/%.d, $(CC_SRC_FILES)) # the following...

Autodependency generation in makefiles


makefile,make,gnu-make,makefile-project,multiple-makefiles
I am trying to understand how autodependency is generated in makefiles in the given link, i cannot understand the following piece of code: DEPDIR = .deps df = $(DEPDIR)/$(*F) SRCS = foo.c bar.c ... %.o : %.c @$(MAKEDEPEND); \ cp $(df).d $(df).P; \ sed -e 's/#.*//' -e 's/^[^:]*: *//' -e...

Dependent C++ project binaries not relinked in Netbeans


c++,netbeans,makefile,make
I've got a two projects in Netbeans. The first a library, and the second an application. The application depends on the library. When I make changes to the library and attempt to run the application the library is rebuilt, however the library and application object files are NOT relinked unless...

make target with multiple extension


makefile,make
How to do the following in gnu make (on mac). I have files with extendion .js and .jsx which needs to go through the build. SRC = $(shell find src -name '*.js' -o -name '*.jsx') LIB = $(SRC:src/%=lib/%) lib/%.js: src/%.js @echo "building [email protected]" above only define the target for *.js...

What does $(@:.h=.h.d) mean in GNU make?


make
I'm maintaining a (horrendously complicated) Makefile, and in some recipes I saw the following: $(@:.h=.h.d) I have absolutely no clue as to how to interpret this, or whether there's any documentation on those characters. Obviously, Google won't work because it thinks I'm typing gibberish. I saw a related question about...

How “make” command locates makefile


unix,make
I am trying to understand the working of "make" command (just started on this command). I have an ".sh" file which has a script to execute "make" command as shown below: source /somepath/environment-setup-cortexa9hf-vfp-neon-poky-linux-gnueabi make arch=arm toolchainPrefix=arm-poky-linux-gnueabi- xeno=off mode=Debug all The directory where the script file is located has a file...

make error during building webkitgtk


linux,makefile,cmake,make
I use UBuntu 14.04 LTS. I need to build webkitgtk 2.8.3 Here is an example instruction which I have used: linuxfromscratch When I run sudo make -j8 I get following log: Scanning dependencies of target JavaScriptCore-4-gir Scanning dependencies of target fake-generated-webkitdom-headers [ 0%] Scanning dependencies of target WebKit2-fake-api-headers Scanning dependencies...

Avr-g++ compilation failed with Make Error 1


eclipse,arduino,make,avr,avr-gcc
I'm trying to compile arduino code in Eclipse. Below is build log. make all Building file: ../test.cpp Starting C++ compile "/bin/avr-g++" -c -g -Os -w -fno-exceptions -ffunction-sections -fdata-sections -fno-threadsafe-statics -MMD -mmcu=atmega328p -DF_CPU=16000000L -DARDUINO=163 -DARDUINO_AVR_UNO -DARDUINO_ARCH_AVR -I"/opt/arduino-1.6.3/hardware/arduino/avr/cores/arduino" -I"/opt/arduino-1.6.3/hardware/arduino/avr/variants/standard" -I/usr/lib/avr/include -MMD -MP -MF"test.cpp.d" -MT"test.cpp.d" -D__IN_ECLIPSE__=1 -x c++ "../test.cpp" -o...

How do I understand and fix error while compiling Linux kernel for embedded system


c,linux-kernel,make,arm,native
While trying to compile the following file: /* * linux/arch/arm/mm/proc-syms.c * * Copyright (C) 2000-2002 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software...

How does make tell when a file hasn't been modified?


make
Make can tell if a file has been modified since the last make invocation. I guess it compares the files' modification times with the time they were last built. To do this it would have to store the latest times on disk, right? Anyone know if and where or how...

What's the difference between [email protected] and $1 when there is only one parameter?


makefile,make
There are some C code: apple.c #include<stdio.h> int main(void) { printf("apple\n"); return 0; } Makefile apple: gcc -c [email protected] gcc [email protected] -o [email protected] $ make apple and it works perfectly. But if I modify Makefile as: apple: gcc -c $1.c gcc $1.o -o $1 $ make apple It does not...

Reuse jquery plugin without conflict


javascript,jquery,plugins,make,conflict
I have a little plugin working as a progressbar. the problem is: I can't update progressbar's value because every change I made, affect just the last object created =( also.. if I call it as: $(node-selector).progBar().setValue() it works calling the correct node but it loss the config object follow the...

How do I run only some makefile commands as root?


c,makefile,make,install,sudo
I have an install target in my Makefile and wish to run some commands that install shared libraries(requires root permissions) and some that install config files into $HOME/.config Usually I'd just tell the user to run sudo make install, however that results in the config file being installed to /root/.config...

Ocamlfind command not found


centos,make,ocaml,opam,ocamlfind
I'm running into an issue installing a package that's reliant on ocamlfind but I'm getting an ocamlfind: command not found error when making. I have installed ocamlfind with the ocaml package manager and have tried reinstalling using "opam reinstall ocamlfind". I have also tried the 'eval opam config env' command...

Makefile process all files in one directory, output to another.


makefile,make
How do I set up a Makefile to process all files in one directory, redirecting output to another (one output file per input file)? I have: INPUTS := $(wildcard ./input/*.txt) OUTPUTS := $(patsubst %.out,%.txt,$(wildcard ./input/*.txt)) $(OUTPUTS): $(INPUTS) python process.py [email protected] > ./output/${@:%.txt=%.out} ... but it keeps regenerating files in ./output...

make: f2py: No such file or directory


python,make,f2py
I am running Mac OS X 10.10. I have some python code I have inherited. I need to run "make" in a certain directory, because I get a warning when I run my python script along the lines of WARNING: failed to import test1lib. Please run make in /this/directory/ So...

LFS 7.2: Hundreds of errors in glibc make check


make,glibc,lfs
I am on Section 6.9 of the LFS book. Everything before this section seemed fine. When I ran make check I got a huge number of errors. A longer transcript of my make check run can be found here on Pastebin. Summary of test results: 865 FAIL 1308 PASS 202...

what does -wl, --start-group mean in make file?


make
I have this in my Make file.. # Create list of object files # LIB_OBJS = -Wl,--start-group \ $(T_OBJ_DIR)/Source1.o \ $(T_OBJ_DIR)/Source2.o \ $(T_OBJ_DIR)/Source3.o \ $(T_OBJ_DIR)/Source4.o \ $(T_OBJ_DIR)/Source5.o \ -Wl,--end-group \ Could anyone please explain What "-Wl,--start-group" and "-Wl,--end-group" mean?...

What does the following makefile command do? /no-symbols-control-file


makefile,make,gnu-make,binaryfiles,contiki
I cam across the following command in a makefile: %-nosyms.$(TARGET).elf: %.co $(PROJECT_OBJECTFILES) $(INTERRUPT_OBJECTFILES) contiki-$(TARGET).a $(CC) $(CFLAGS) -o [email protected] $(filter-out %.a,$^) $(filter %.a,$^) $(filter %.a,$^) $(LDFLAGS) Source: Contiki/cpu/arm/stm32f103/Makefile.stm32f103 . Does this command generate no-symbols-control-file? What is the use of a no symbol image file?...

basic makefile ifeq how to


makefile,make,gnu-make
I am just learning about Makefiles and am having trouble with ifeq. Version = GNU Make 3.82 Here is my simple Makefile: CHECK := 0 CHECK2 := 0 check : @echo "Check=${CHECK}" @echo "Check2=${CHECK2}" ifeq (${CHECK2},${CHECK}) @echo "EQUAL" else @echo "NOT EQUAL" endif Here is the output: Check=0 Check2=0 NOT...

Make manage file in different directory


make
I have a program to compile a Less file into a CSS file. I've made a wildcard make target, which calls lessc with appropriate arguments to create the CSS file in the same directory: %.css: %.less node_modules/less/bin/lessc node_modules/less/bin/lessc $< [email protected] This produces the following output directory structure: css/ |- foo.less...

Dot in front of variables in make files


makefile,make,gnu-make
I am not able to figure out what does a dot . in front of a variable in makefile does. For e.g.: SOURCEDIRS = . $(PROJECTDIRS) $(TARGET_DIRS_CONCAT) vpath %.c $(SOURCEDIRS) It would be great if someone could tell me. Thanks!...

dividing outputs in make by filename


bash,make
I am processing some files and want to at one point create two categories depending on the filename so I can compare the two. Is this possible in a makefile? %.output1: %.input ifneq (,$(findstring filename1,$(echo $<))) mv $<.output1 [email protected] endif %.output2: %.input ifneq (,$(findstring filename2,$(echo $<))) mv $<.output2 [email protected] endif...

How does MAKE remember the file timestamps


c,make
I've found this question which is basically asking the same, but got no real answer. Where is the make's config file / database file where it remembers the file timestamps, so it can tell what changed? I checked and there's no .make or similar in my project, nor in the...

Makefile : fclean gives error if program is not yet built


makefile,make
I have 2 makefiles that crash when I use the command make re if the program (or library) is not yet previously built, because make re calls fclean, which should remove the file and crashes if the file is not found. Here is one of the makefiles for a library...

A make rule for verbosity


makefile,make
Typically we have this in a Makefile %.o:%.c $(cc) $(flags) -o [email protected] -c $< When the amount of flags is huge, I feel better to write this instead %.o:%.c $(info $(cc): $< --> [email protected]) @$(cc) $(flags) -o [email protected] -c $< However it can be useful to sometime see everything. So...

xcode 6.3.2 external build


c++,xcode,makefile,make
I'm trying to compile an existing c++ project, originally developed on linux with gcc. The only external library is GSL (GNU Scientific Library). I have created an external build tool project to use xcode's debugger, but I currently have two issues. 1) When I try to build in xcode it...

Haskell make recipe fails for Paradox theorem prover using GHC


linux,haskell,make,ghc,theorem-proving
I am trying to install the paradox theorem prover sourced from here. When I run the makefile this is the command that runs: ghc -optl -static -lstdc++ -I../instantiate -I../minisat/current-base ../minisat/current-base/Solver.or ../minisat/current-base/Prop.or ../instantiate/MiniSatWrapper.or ../instantiate/MiniSatInstantiateClause.or -fglasgow-exts -O2 -static -threaded -main-is Paradox.Main.main --make Paradox.Main -o paradox And it results in several errors like...

Why does gcc search header files from non-exist folders?


c,linux,gcc,compiler-errors,make
I am trying to build an open source project shark on CentOS 7, and get very weird build errors: make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include/stdarg.h', needed by `core/luv/luv.o'. make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include/stddef.h', needed by `core/luv/luv.o'. make: *** No rule to make target `/usr/lib/gcc/x86_64-linux-gnu/4.8/include-fixed/limits.h', needed...

Nested For loop in makefile


shell,makefile,make
I am trying to loop through the .c files in a specific directory through the makefile. i used the following code, but it seems not working: DIR= Sources \ Sources_2 @for entry in ${DIR} ; \ do \ @for i in $${entry}/*.c ; \ do \ echo "Processing $${i}"; \...

Makefile overriding default implicit rule


c++,c,makefile,make
Why this rule cannot override the default implicit rule ? When make is invoked like: make myapp (suppose myapp.c is there). The make runs the default command to build and link the program instead the commands defined in this implicit rule: #... omitted code LCUS=$(LIBS)/libcus.a #... omitted code % :...

Can Make be made to understand that a/../z and b/../z are the same location?


makefile,make,gnu-make
I have a somewhat large and complex Makefile setup that postprocesses some data files. Overall it work quite well, but I have run into an annoying issue where Make builds the same target many times over under different directory names. As a simple example, consider the Makefile foo : 1/foo...

How to put this command in a Makefile?


awk,makefile,make,docker
I have the following command I want to execute in a Makefile but I'm not sure how. The command is docker rmi -f $(docker images | grep "<none>" | awk "{print \$3}") The command executed between $(..) should produce output which is fed to docker rmi but this is not...

Visual Studio Make instead of GNU Make with Cygwin


make,cygwin,gnu-make
I'm still trying to build VTK on windows. I have installed Cygwin and I'm done configuring with CMake I think. However I'm facing the error that you can see on the screenshot below: the make command somehow tries to make through MS Visual Studio while I want to use the...

How to correctly make install of binaries and data after compile in linux?


linux,make,install
After make of sources I have compiled executable file and data directory with images for it. What should I do at "make install" phase to correctly install these files to the linux system? And how then application can find installed data (in case when binary and data are placed in...

make with Cygwin


windows,make,cygwin
I am trying to set VTK on windows (did I say it was complicated?^^). I have successfully configured VTK with CMake and I am now trying to run make through cygwin. However when I go to the build directory and enter make all the terminal prints and does is: make...

Building only a small subset of project using autotools


make,autotools,autoconf
I have a large project using autotools that contains some code that builds into a utility library. The project has quite a few dependencies and I would like to compile a specific subset of that utility library for mobile environments (Android/iOS). I expect a lot of dependencies to be unnecessary...

After building julia from source, what's safe to delete?


make,julia-lang
I was able to build it on a tiny computer, but the result now takes up ~ 1 GB of the 1.3 GB I had free. Most of this is in the /deps folder -- this is safe to delete after the build, correct?

CTest not detecting tests


cmake,make,ctest
I have a project with a structure ├── CMakeLists.txt ├── mzl.c ├── mzl.h └── tests ├── CMakeLists.txt ├── mzl-communication-test.c ├── mzl-setup-test.c ├── mzl-test-errors.c └── mzl-test-errors.h Where the top directory CMakeLists.txt file is project(mzl) cmake_minimum_required(VERSION 2.8) add_subdirectory(tests) # Enable testing for the project enable_testing() # Find zmq find_library(ZMQ_LIB zmq REQUIRED) message(STATUS...

Do you only need to build the googletest library once?


c++,cmake,make,static-libraries,googletest
So firstly I'm new to testing frameworks and relatively new to C++ but am trying to wrap my head around GoogleTest. I'm working on a Windows machine, running "Git for Windows" (MSYS) and MinGW whilst using Sublime Text as my code editor. I am using make as my build tool,...

GNU make equivalent to BSD make's $(var:Q)?


makefile,make,gnu-make,bsdmake
BSD make has a :Q variable expansion modifier, documented in the FreeBSD make man page as follows: :Q Quotes every shell meta-character in the variable, so that it can be passed safely through recursive invocations of make. If variable var has value a b\c"d'e$f, then $(var:Q) expands to a\ b\\c\"d\'e\$f...

Eclipse Makefile: Make Variables are skipped


eclipse,makefile,make
I have a project with a Makefile in it, on Unix console it works fine, compiles, builds and I can run the binary at the end. I imported the project into Eclipse workspace and somehow Makefile module of Eclipse cannot build the project now. It gives the following error: g++:...